Test Point Insertion For Low Test Pattern Counts

摘要

Various aspects of the disclosed technology relate to conflict-reducing test point insertion techniques. Locations in a circuit design for inserting test points are determined based on internal signal conflicts caused by detecting multiple faults with a single test pattern. Test points are then inserted at the locations. The internal signal conflicts may comprise horizontal conflicts, vertical conflicts, or both. The test points may comprise control points, observation points, or both.

主权项

1. A method, executed by at least one processor of a computer, comprising:
determining locations in a circuit design for inserting test points based on internal signal conflicts caused by detecting multiple faults with a single test pattern; inserting test points at the locations.