| 摘要 |
An integrated oscillator circuit has a plurality oscillator stages including a first oscillator stage, an odd number of intermediate oscillator stages, and a last oscillator stage arranged in series. Each of the oscillator stages has a reverse-biased diode device and a transistor coupled in series between a power supply and a ground. Each diode device has an anode and a cathode, and each transistor has a control terminal for controlling a current flow from a first terminal to a second terminal. In each oscillator stage, the anode of the diode is coupled to the first terminal of the transistor at an internal node. The control terminal of the transistor in each oscillator stage is coupled to the internal node of a proceeding oscillator stage. Further, the control terminal of the transistor in the first oscillator stage is coupled to the internal node of the last oscillator stage. |
| 主权项 |
1. An integrated oscillator circuit, comprising:
a reverse-biased first diode device and a first MOS transistor coupled in series between a power supply and a ground, a cathode of the first diode device coupled to the power supply, an anode of the first diode device coupled to a drain of the first MOS transistor, and a source of the first MOS transistor coupled to the ground; a reverse-biased second diode device and a second MOS transistor coupled in series between the power supply and the ground, a cathode of the second diode device coupled to the power supply, an anode of the second diode device coupled to a drain of the second MOS transistor, a source of the second MOS transistor coupled to the ground, and a gate of the second MOS transistor coupled to the drain of the first MOS transistor; and a reverse-biased third diode device and a third MOS transistor coupled in series between the power supply and the ground, a cathode of the third diode device coupled to the power supply, an anode of the third diode device coupled to a drain of the third MOS transistor, a gate of the third MOS transistor coupled to the drain of the second MOS transistor, a source of the second MOS transistor coupled to the ground, and the drain of the third MOS transistor being coupled to a gate of the first MOS transistor; wherein the integrated oscillator circuit further comprising an output buffer circuit that includes: a fourth MOS transistor having a gate coupled to the drain of the third MOS transistor; a fifth MOS transistor having a gate coupled to the drain of the first MOS transistor; a sixth and a seventh MOS transistors forming a current mirror, the sixth transistor coupled to the fourth MOS transistor and the seventh MOS transistor coupled to the fifth transistor. |
