发明名称 CLOCK CORRECTION CIRCUIT AND CLOCK CORRECTION METHOD
摘要 An operation clock generation circuit performs a calculation on the basis of the frequency errors of a fundamental clock and the clock pulses of the fundamental clock, and generates an operation clock obtained by correcting the frequency errors at first intervals. A correction clock generation circuit converts a lower-bit value that is a value represented by the bits lower than the predefined bit used for judging the change of the state of the operation clock into a count number of the clock pulses of a second clock whose frequency is higher than that of the operation clock, generates a correction clock obtained by correcting the operation clock on the basis of a time required for counting the count number of the clock pulses and the clock pulses of the operation clock.
申请公布号 US2016112034(A1) 申请公布日期 2016.04.21
申请号 US201514984107 申请日期 2015.12.30
申请人 Renesas Electronics Corporation 发明人 Yasukawa Tomoki;Kawai Kazuyoshi
分类号 H03K3/011 主分类号 H03K3/011
代理机构 代理人
主权项 1. A real-time clock circuit comprising: a clock correction circuit that generates a first clock from a second clock having a frequency error; and a correction register that stores a value corresponding to the frequency error, wherein a target frequency of the first clock is 1 Hz, wherein a frequency of the second clock is substantially equal to 32.768 KHz, wherein the value is translated to a correction value per one second, and wherein the clock correction circuit adjusts the first clock at an interval of one second using the correction value.
地址 Tokyo JP