发明名称 INTEGRATED CIRCUIT AND LOW POWER METHOD OF OPERATION
摘要 A system-on-chip device operates in a low power mode and keeps on-board peripherals such as FIFO registers operational by maintaining a low frequency bit clock and gating other clock sources. When a peripheral device initiates a DMA (direct memory access) operation, the SOC's bus clock is enabled in response to a signal generated by the peripheral. Once data has been moved between the peripheral and system memory, the bus clock can be gated again.
申请公布号 US2016109928(A1) 申请公布日期 2016.04.21
申请号 US201414556227 申请日期 2014.11.30
申请人 He Yedong;Wang Zhihong 发明人 He Yedong;Wang Zhihong
分类号 G06F1/32;G06F13/38;G06F5/14;G06F13/28 主分类号 G06F1/32
代理机构 代理人
主权项 1. A method of operating an integrated circuit device, the method comprising: exchanging data between a peripheral device internal to the integrated circuit and a remote device external to the integrated circuit under the control of a bit rate clock signal; disabling a bus clock signal in a first mode of operation; and enabling the bus clock signal and exchanging data between the peripheral device and system memory under the control of the bus clock signal in a second mode of operation.
地址 Suzhou CN