发明名称 はんだ付け緩和方法およびそれを使用した半導体デバイス
摘要 A semiconductor device includes a substrate having a first side and a second side, the second side having a mounting location for at least one semiconductor element, and the first side having a plurality of locations electrically connected to locations on the second side. A plurality of electrically conductive interconnects are provided at the locations, each having a first end attached at the location and a second end spaced from the substrate, and an encapsulant partially encapsulates the plurality of interconnects and has a surface lying in a first plane. The second ends are located on the side of the first plane opposite from the substrate first side, an annular space in the encapsulant surrounds each of the plurality of electrically conductive interconnects, and the annular space has a bottom located between the first plane and the substrate first side. Also a method for making such a semiconductor device.
申请公布号 JP5905104(B2) 申请公布日期 2016.04.20
申请号 JP20140529953 申请日期 2012.09.10
申请人 クアルコム,インコーポレイテッド 发明人 マーク・ウェンデル・シュヴァルツ;ジアンウェン・シュウ
分类号 H01L23/12;H01L23/28 主分类号 H01L23/12
代理机构 代理人
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