发明名称 Signal processor and communication device
摘要 A signal processor includes a period detection section which detects that a period is currently used for communication of a frame; a pattern detection section which detects, from the received signal, a first signal pattern by which the end of communication of the frame is recognized; and an output processing section which outputs the received signal to a controller; configured to instruct, upon detection of the first signal pattern in the period being currently used for communication of a frame, the controller to halt startup of communication action of the next frame, until the period being currently used for communication of a frame comes to the end, to thereby reduce an event such that frames are transmitted from a plurality of communication devices simultaneously, and to thereby allow the communication action for the next frame to proceed correctly.
申请公布号 US9319162(B2) 申请公布日期 2016.04.19
申请号 US201314085013 申请日期 2013.11.20
申请人 Cypress Semiconductor Corporation 发明人 Shimamura Akira;Mita Koichi;Arai Takashi;Fujishima Hideshi;Endo Akira
分类号 H04J3/06;H04L29/06;H04L12/40 主分类号 H04J3/06
代理机构 代理人
主权项 1. A signal processor configured to allow a communication device to recognize the end of communication of a frame, based on a received signal, and to start a communication action of a next frame, the signal processor comprising: a controller configured to halt a beginning of the communication action of the next frame; an output processing section configured to instruct the controller to halt the beginning of the communication action of the next frame, upon detection of a first signal pattern in a period currently being used for communication of the frame, and until the period currently being used for communication of the frame ends, and wherein the output processing section is further configured to output the received signal to the controller.
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