发明名称 Self-aligned metal oxide TFT with reduced number of masks and with reduced power consumption
摘要 A method of fabricating MOTFTs includes positioning opaque gate metal on a transparent substrate, depositing gate dielectric material overlying the gate metal and a surrounding area, and depositing metal oxide semiconductor material thereon. Etch stop material is deposited on the semiconductor material. Photoresist defines an isolation area in the semiconductor material. Exposing the photoresist from the rear surface of the substrate and removing exposed portions to leave the etch stop material uncovered except for a portion overlying and aligned with the gate metal. Etching uncovered portions of the semiconductor material to isolate the TFT. Using the photoresist, selectively etching the etch stop layer to leave a portion overlying and aligned with the gate metal and defining a channel area in the semiconductor material. Depositing and patterning conductive material to form source and drain areas.
申请公布号 US9318614(B2) 申请公布日期 2016.04.19
申请号 US201314071644 申请日期 2013.11.05
申请人 CBRITE INC. 发明人 Shieh Chan-Long;Yu Gang;Foong Fatt
分类号 H01L21/00;H01L29/786;H01L27/12;H01L29/66;H01L21/70;H01L21/02 主分类号 H01L21/00
代理机构 Parsons & Goltry 代理人 Parson Robert A.;Goltry Michael W.;Parsons & Goltry
主权项 1. A method of fabricating an active matrix backpanel with metal oxide TFT array on transparent substrates comprising at least the steps of: providing a transparent substrate having a front surface and a rear surface; depositing a blanket opaque gate metal on the front surface of the substrate and patterning the metal layer to form gate/selection lines with patterns defining the gate area of each TFT; depositing a layer of transparent gate dielectric material on the front surface of the substrate overlying the gate metal and a surrounding area and a layer of transparent metal oxide semiconductor material on the surface of the layer of transparent gate dielectric; patterning the transparent metal-oxide semiconductor layer to areas corresponding to an entire TFT channel and at least portions of source/drain contacts; depositing a layer of etch stop material on the patterned layer of metal oxide semiconductor material; coating a layer of positive-tone photoresist material on the layer of etch stop material; exposing the photoresist material from the rear surface of the substrate using the opaque gate metal on the front surface of the substrate as a built-in mask and removing exposed portions of the photoresist material so as to leave the layer of etch stop material exposed except for a portion overlying and aligned with the gate metal; using the portion of the photoresist material directly overlying and aligned with the gate metal layer, selectively etching exposed portions of the etch stop layer leaving a portion of the etch stop layer overlying and aligned with the gate metal, the portion of the etch stop layer defining a channel area in the layer of metal oxide semiconductor material with via-holes in source/drain contact areas, depositing a conductive layer and patterning it to form data lines of the TFT array crossing-over the gate/selection lines and the source and drain contact electrodes on opposed sides of the channel area and in the via-holes in the etch-stop layer; depositing a conductive layer and patterning the conductive layer to form a pixel electrode within each pixel of the active matrix backpanel.
地址 Goleta CA US