发明名称 Display device
摘要 A display device includes pixels and includes a gate driver for providing gate signals to the pixels. The display device further includes a level shifter element for providing a boosted clock signal to the gate driver. The display device further includes a controller. The level shifter element includes a first level shifter for providing one of a first gate-on voltage and a gate-off voltage as a first clock signal in response to a gate pulse signal received from the controller. The level shifter element further includes a second level shifter for providing one of a second gate-on voltage and the first clock signal as the boosted clock signal in response to a first control signal received from the controller. The second gate-on voltage is higher than the first gate-on voltage. The gate driver may provide the gate signals in response to the boosted clock signal.
申请公布号 US9318071(B2) 申请公布日期 2016.04.19
申请号 US201313753291 申请日期 2013.01.29
申请人 SAMSUNG DISPLAY CO., LTD. 发明人 Won Myung-Ho;You Ri-Na
分类号 G09G5/00;G09G3/36 主分类号 G09G5/00
代理机构 Innovation Counsel LLP 代理人 Innovation Counsel LLP
主权项 1. A display device, comprising: a display panel including a plurality of pixels connected to a plurality of data lines and a plurality of gate lines; a gate driver configured to provide gate signals through the plurality of gate lines to the plurality of pixels; a data driver configured to provide data signals through the plurality of data lines to the plurality of pixels; a level shifter element configured to provide a first boosted gate clock signal to the gate driver; and a timing controller configured to provide a plurality of control signals for controlling the level shifter element, the gate driver, and the data driver, wherein the level shifter element comprises: a first level shifter configured to provide one of a first gate-on voltage and a gate-off voltage as a first gate clock signal in response to a gate pulse signal received from the timing controller; and a second level shifter configured to receive the first gate clock signal, configured to provide the first boosted gate clock signal based on the first gate clock signal, and configured to provide one of a second gate-on voltage and the first gate clock signal as the first boosted gate clock signal in response to a first control signal received from the timing controller, wherein the second gate-on voltage is higher than the first gate-on voltage, and wherein the gate driver is configured to provide one or more of the gate signals in response to the first boosted gate clock signal.
地址 KR