发明名称 |
System, methods and apparatus using virtual appliances in a semiconductor test environment |
摘要 |
In one embodiment, a semiconductor test control system includes a computer system having a plurality of hardware resources; a hypervisor installed on the computer system; and a test floor controller installed on the computer system. The hypervisor virtualizes the hardware resources and provides each of at least one virtual appliance with access to a respective virtual set of the hardware resources. Each virtual set of the hardware resources places its respective virtual appliance in controlling communication with at least a first aspect of a semiconductor test system, thereby enabling the respective virtual appliance to test a respective type of semiconductor device. The test floor controller is in controlling communication with i) at least a second aspect of the semiconductor test system, and ii) each of the at least one virtual appliance. |
申请公布号 |
US9317351(B2) |
申请公布日期 |
2016.04.19 |
申请号 |
US201013821559 |
申请日期 |
2010.09.07 |
申请人 |
ADVANTEST CORPORATION |
发明人 |
Hilliges Klaus-Dieter;Lin Jia-Wei;Gurley Duncan;Jin Jim-my;Vokerink Eric |
分类号 |
G06F11/00;G06F11/07;G06F11/22;G06F11/30;G01R31/28;G01R31/319;G06F11/26;G06F9/455 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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主权项 |
1. A method of controlling a semiconductor test system to test semiconductor devices, comprising:
virtualizing a plurality of hardware resources of a computer system; installing at least two different virtual appliances on the computer system, the installation of each different virtual appliance providing the respective virtual appliance with access to a different respective virtual set of the hardware resources of the computer system, and each of the different virtual set of the hardware resources placing a respective one of the different virtual appliances in controlling communication with at least a first aspect of the semiconductor test system that relate to execution of a test program for a particular type of semiconductor device, thereby enabling the respective virtual appliance to test a respective type of semiconductor device; using a test floor controller installed on the computer system to control at least a second aspect of the semiconductor test system, wherein the second aspect of the semiconductor test system differs from the first aspect of the semiconductor test system; and using the test floor controller in controlling communication with each of the virtual appliances to operate each of the virtual appliances. |
地址 |
Tokyo JP |