Apparatus and method of compensating for clock frequency and phase variations by processing packet delay values

摘要

An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.

主权项

1. An apparatus, comprising:
a statistical parameter determination module configured to determine:
a value of a first parameter of a first statistical parameter type based on a first plurality of packet delay values;a value of a second parameter of the first statistical parameter type based on a second plurality of packet delay values determined subsequent to the first plurality of packet delay values;a value of a first parameter of a second statistical parameter type based on the first plurality of packet delay values, the second statistical parameter type being different from the first statistical parameter type; anda value of a second parameter of the second statistical parameter type based on the second plurality of packet delay values; and the statistical parameter determination module configured to send a signal to a network rearrangement detection module such that the network rearrangement detection module detects a network rearrangement based on the value of the first parameter of the first statistical parameter type, the value of the second parameter of the first statistical parameter type, the value of the first parameter of the second statistical parameter type, and the value of the second parameter of the second statistical parameter type; the statistical parameter determination module being implemented in at least one of a memory or a processing device.