Soft decoding of polar codes

摘要

An apparatus having a circuit and an interface to a nonvolatile memory is disclosed. The circuit is configured to (i) read a plurality of bits in a read channel of the nonvolatile memory. The bits are encoded with a polar code. The circuit is also configured to (ii) generate a plurality of probabilities based on a plurality of log likelihood ratio values of the read channel and (iii) decode the bits based on the probabilities.

主权项

1. An apparatus comprising:
an interface configured to process a plurality of read/write operations to/from a memory; and a control circuit configured to (i) read a plurality of bits in a read channel of the memory, wherein the plurality of bits are encoded with a polar code, (ii) generate a plurality of probabilities of transition errors between two possible states of the plurality of bits based on a plurality of log likelihood ratio values of the read channel of the memory and (iii) decode the plurality of bits based on the plurality of probabilities of transition errors.