Dielectric extension to mitigate short channel effects

摘要

In patterning a transistor, some of a layer of gate dielectric material is allowed to remain over a semiconductor substrate upon which the transistor is formed. This remaining dielectric material retards the implantation of dopants into the underlying substrate, effectively lengthening a channel region of the transistor. This mitigates unwanted short channel effects, such as leakage currents, for example, and thus mitigates yield loss by establishing a transistor that performs in a more predictable or otherwise desirable manner.

主权项

1. A method comprising:
patterning a layer of gate electrode material such that apertures are created in the layer of gate electrode material and passivants accumulate on sidewalls of the apertures, wherein the patterning uses a first etching composition; patterning a layer of gate dielectric material to form openings in the layer of gate dielectric material, wherein the patterning the layer of gate dielectric material leaves behind a portion of the passivants accumulated on the sidewalls of the apertures; removing at least some of the portion of the passivants accumulated on the sidewalls to create dielectric extensions that extend out into the apertures, wherein the removing the at least some of the portion of the passivants creates dielectric extensions that are configured to retard implantation of dopants into a substrate; and implanting dopants into a substrate that underlies the layer of gate dielectric material to establish source/drain regions in the substrate, wherein the source/drain regions each have a length that is approximately equal to a distance between adjacent openings in the layer of gate dielectric material so as to have an effect of lengthening a channel of a semiconductor device and mitigating a short channel effect experienced by the semiconductor device.