发明名称 |
Semiconductor memory device |
摘要 |
A semiconductor memory device according to an embodiment comprises: a plurality of first lines extending in a first direction perpendicular to a substrate surface and arranged with a certain pitch in a second direction parallel to the substrate surface; a plurality of second lines extending in the second direction and arranged with a certain pitch in the first direction; a memory cell provided at an intersection of the first line and the second line and including a variable resistance element; a third line provided extending in the second direction between the plurality of second lines; and a control circuit capable of executing a first operation that changes a resistance value of the variable resistance element by applying a voltage to the memory cell via the first line and the second line, and a second operation that supplies heat to the memory cell using the third line. |
申请公布号 |
US9318193(B2) |
申请公布日期 |
2016.04.19 |
申请号 |
US201414491086 |
申请日期 |
2014.09.19 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
Toriyama Shuichi |
分类号 |
G11C11/00;G11C13/00 |
主分类号 |
G11C11/00 |
代理机构 |
Oblon, McClelland, Maier & Neustadt, L.L.P. |
代理人 |
Oblon, McClelland, Maier & Neustadt, L.L.P. |
主权项 |
1. A semiconductor memory device, comprising:
a plurality of first lines extending in a first direction perpendicular to a substrate surface and arranged with a certain pitch in a second direction parallel to the substrate surface; a plurality of second lines extending in the second direction and arranged with a certain pitch in the first direction; a memory cell provided at an intersection of the first line and the second line and including a variable resistance element; a third line extending in the second direction between the plurality of second lines; and a control circuit capable of executing a first operation that changes a resistance value of the variable resistance element by applying a voltage to the memory cell via the first line and the second line, and a second operation that supplies heat to the memory cell using the third line. |
地址 |
Minato-ku JP |