METHOD OF FORMING METAL INTERCONNECTIONS OF SEMICONDUCTOR DEVICE

摘要

A method of forming a metal interconnection of semiconductor device is provided. The method includes forming a low-k dielectric layer including an opening; forming a barrier metal pattern conformally covering a bottom surface and an inner sidewall of the opening; forming a metal pattern exposing a part of the inner sidewall of the barrier metal pattern in the opening; forming a metal capping layer on the top surfaces of the metal pattern and the low-k dielectric layer using a selective chemical vapor deposition process, wherein the thickness of the metal capping layer on the metal pattern is greater than the thickness of the metal capping layer on the low-k dielectric layer; and forming a metal capping pattern covering the top surface of the metal pattern by planarizing the metal capping layer down to the top surface of the low-k dielectric layer.

主权项

1. A semiconductor device comprising:
a substrate; a low-k dielectric layer disposed on the substrate and including a trench; a barrier metal pattern formed in the trench; a metal pattern formed in the trench and disposed on the barrier metal pattern, the metal pattern being formed of copper; a metal capping pattern formed in the trench and disposed on the metal pattern; and a capping insulating layer covering a top surface of the metal capping pattern and a top surface of the low-k dielectric layer, wherein the capping insulating layer is formed of an insulating material different from the low-k dielectric layer, a top surface of the metal capping pattern is lower than the top surface of the low-k dielectric layer, the capping insulating layer includes a first portion disposed on the metal capping pattern and a second portion disposed on the low-k dielectric layer, and a thickness of at least a part of the first portion of the capping insulating layer is greater than a thickness of at least a part of the second portion of the capping insulating layer.