UNIFIED TOOL FOR AUTOMATIC DESIGN CONSTRAINTS GENERATION AND VERIFICATION

摘要

Systems, methods, and other embodiments associated with providing a unified tool for performing design constraints generation and verification for circuit designs are described. In one embodiment, the unified tool reads design data and design intent information for a circuit design. The unified tool generates physical flow elements and verification flow elements of the circuit design, together and in dependence on each other, based, at least in part, on the design data and the design intent information.

主权项

1. A computer-implemented method comprising:
reading, by a unified tool,
(i) design data for a circuit design, and(ii) design intent information for the circuit design; and generating, by the unified tool,
(i) physical flow elements of the circuit design, and(ii) verification flow elements of the circuit design,wherein the generating physical flow elements and the generating verification flow elements are performed together and in dependence on each other by the unified tool based, at least in part, on the design data and the design intent information.