发明名称 |
Methods of Fabricating Semiconductor Devices |
摘要 |
Semiconductor devices and methods of fabricating semiconductor devices are provided. The methods may include forming an interlayer insulation layer on a substrate. The interlayer insulation layer may surround a dummy silicon gate and may expose a top surface of the dummy silicon gate. The methods may also include recessing a portion of the interlayer insulation layer such that a portion of the dummy silicon gate protrudes above a top surface of the recessed interlayer insulation layer and forming an etch stop layer on the recessed interlayer insulation layer. A top surface of the etch stop layer may be coplanarly positioned with the top surface of the dummy silicon gate. The methods may further include forming a trench exposing the substrate by removing the dummy silicon gate using the etch stop layer as a mask. |
申请公布号 |
US2016104788(A1) |
申请公布日期 |
2016.04.14 |
申请号 |
US201514815225 |
申请日期 |
2015.07.31 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
RYU Yeon-Tack;KIM Ho-Young;OH Myoung-Hwan;YOON Bo-Un;YIM Jun-Hwan |
分类号 |
H01L29/66;H01L29/40;H01L21/283 |
主分类号 |
H01L29/66 |
代理机构 |
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代理人 |
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主权项 |
1. A method of fabricating a semiconductor device, the method comprising:
forming an interlayer insulation layer on a substrate, the interlayer insulation layer surrounding a dummy silicon gate and exposing a top surface of the dummy silicon gate; recessing a portion of the interlayer insulation layer such that a portion of the dummy silicon gate protrudes above a top surface of the recessed interlayer insulation layer; forming an etch stop layer on the recessed interlayer insulation layer, a top surface of the etch stop layer being coplanarly positioned with the top surface of the dummy silicon gate; and forming a trench exposing the substrate by removing the dummy silicon gate using the etch stop layer as a mask. |
地址 |
Suwon-si KR |