发明名称 Memory Device With Timing Overlap Mode
摘要 In some examples, a memory device is configured to receive a precharge command and an activate command. The memory device performs a first series of events related to the precharge command in response to receiving the precharge command and a second series of events related to the activate command in response to receiving the activate command. The memory device delays the start of the second series of events until the first series of events completes.
申请公布号 US2016104518(A1) 申请公布日期 2016.04.14
申请号 US201514973884 申请日期 2015.12.18
申请人 Everspin Technologies, Inc. 发明人 Andre Thomas;Alam Syed M.;Lin Halbert S.
分类号 G11C7/12 主分类号 G11C7/12
代理机构 代理人
主权项
地址 Chandler AZ US