发明名称 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
摘要 A silicon carbide semiconductor device includes: a vertical MOSFET having: a semiconductor substrate including a high-concentration impurity layer and a drift layer; a base region; a source region; a trench gate structure; a source electrode; and a drain electrode. The base region has a high-concentration base region and a low-concentration base region having a second conductivity type with an impurity concentration lower than the high-concentration base region, which are stacked each other. Each of the high-concentration base region and the low-concentration base region contacts a side surface of the trench.
申请公布号 US2016104794(A1) 申请公布日期 2016.04.14
申请号 US201414894668 申请日期 2014.05.28
申请人 DENSO CORPORATION 发明人 TAKEUCHI Yuichi;SUZUKI Naohiro;MORIMOTO Jun;SOEJIMA Narumasa
分类号 H01L29/78;H01L29/66;H01L29/10;H01L29/16 主分类号 H01L29/78
代理机构 代理人
主权项 1. A silicon carbide semiconductor device comprising: a vertical MOSFET, wherein: the vertical MOSFET includes: a semiconductor substrate that is made of silicon carbide having a first conductivity type, and includes a high-concentration impurity layer arranged on a rear surface side and a drift layer arranged on a front surface side and having an impurity concentration lower than the high-concentration impurity layer;a base region that is made of silicon carbide, and arranged on the drift layer;a source region that is arranged in an upper portion of the base region, and made of silicon carbide having the first conductivity type with an impurity concentration higher than the drift layer;a trench gate structure that includes a trench extending from a surface of the source region to a position deeper than the base region, a gate insulating film arranged on an inner wall of the trench, and a gate electrode arranged on the gate insulating film;a source electrode that is electrically connected to the source region; anda drain electrode that is electrically connected to the high-concentration impurity layer on the rear surface side of the semiconductor substrate, wherein: the base region has a high-concentration base region and a low-concentration base region, which are stacked each other, the low-concentration base region having a second conductivity type with an impurity concentration lower than the high-concentration base region; and each of the high-concentration base region and the low-concentration base region contacts a side surface of the trench.
地址 Kariya-city, Aichi-pref. JP