| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an image processor capable of easily changing a configuration according to contents of image processing. <P>SOLUTION: An image processor 100 includes image processing units 410, 430 and 450. The image processing units 410, 430 and 450 are connected through a memory bus 470 to a memory 480 respectively. The image processing unit 410 includes a bus master 412 and an image processing circuit 411. The image processing unit 430 includes a bus master 432 and an image processing circuit 431. The image processing unit 450 includes a bus master 452 and an image processing circuit 451. A WRC circuit 419 writes data to a virtual FIFO area 481 set so as to be accessed in a ring shape. A LAY circuit 435 reads the data from the virtual FIFO area 481. A WRC circuit 439 writes the data in a virtual FIFO area 482 set so as to be accessed in the ring shape. A LAY circuit 455 reads the data from the virtual FIFO area 482. <P>COPYRIGHT: (C)2013,JPO&INPIT |
