Using register last use information to perform decode time computer instruction optimization

摘要

Two computer machine instructions are fetched for execution, but replaced by a single optimized instruction to be executed, wherein a temporary register used by the two instructions is identified as a last-use register, where a last-use register has a value that is not to be accessed by later instructions, whereby the two computer machine instructions are replaced by a single optimized internal instruction for execution, the single optimized instruction not including the last-use register.

主权项

1. A computer system for optimizing instructions to be executed, the system comprising:
a processor, the processor comprising an instruction fetcher, an instruction decoder and an execution unit, the processor configured to perform a method comprising: fetching two instructions for execution; determining that the two instructions to be executed are candidates for optimization to a single optimized internal instruction, the two instructions comprising a first instruction identifying a first operand as a target operand and a second instruction identifying, the first operand as a source operand, the first instruction preceding the second instruction in program order; determining that the first operand is specified as a last-use operand that is not used after execution of the second instruction; creating the single optimized internal instruction based on the two instructions, wherein the single optimized internal instruction does not specify the first operand; and executing the single optimized internal instruction instead of the two instructions.