发明名称 Methods for fabricating integrated circuits with improved implantation processes
摘要 Methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes providing a structure having an n-channel gate stack and a p-channel gate stack formed over a semiconductor substrate. The method includes forming halo implant regions in the semiconductor substrate adjacent the p-channel gate stack and forming extension implant regions in the semiconductor substrate adjacent the p-channel gate stack. The method further includes annealing the halo implant regions and the extension implant regions in the semiconductor substrate adjacent the p-channel gate stack by performing a laser anneal process. Also, the method forms extension implant regions in the semiconductor substrate adjacent the n-channel gate stack.
申请公布号 US9312189(B2) 申请公布日期 2016.04.12
申请号 US201414244651 申请日期 2014.04.03
申请人 GLOBALFOUNDRIES, INC. 发明人 Zaka Alban;Yan Ran;Bazizi El Mehdi;Hoentschel Jan
分类号 H01L21/425;H01L21/8238;H01L21/265;H01L21/266;H01L21/324;H01L29/66;H01L29/167;H01L27/092 主分类号 H01L21/425
代理机构 Ingrassia Fisher & Lorenz, P.C. 代理人 Ingrassia Fisher & Lorenz, P.C.
主权项 1. A method for fabricating an integrated circuit, the method comprising: providing a semiconductor substrate with first gates overlying second conductive type regions in the semiconductor substrate and second gates overlying first conductive type regions in the semiconductor substrate; performing a first ion implantation to form halo implant regions in the semiconductor substrate adjacent selected second gates; after performing the first ion implantation, performing a second ion implantation to form halo implant regions in the semiconductor substrate adjacent selected first gates; after performing the second ion implantation, performing a third ion implantation to form extension implant regions in the semiconductor substrate adjacent the selected first gates; and after performing the third ion implantation, performing a fourth ion implantation to form extension implant regions in the semiconductor substrate adjacent the selected second gates.
地址 Grand Cayman KY