发明名称 High-throughput semiconductor-processing apparatus equipped with multiple dual-chamber modules
摘要 A wafer-processing apparatus includes: eight or ten reactors with identical capacity for processing wafers on the same plane, constituting four or five discrete units, each unit having two reactors arranged side by side with their fronts aligned in a line; a wafer-handling chamber including two wafer-handling robot arms each having at least two end-effectors; a load lock chamber; and a sequencer for performing, using the two wafer-handling robot arms, steps of unloading/loading processed/unprocessed wafers from/to any one of the units, and steps of unloading/loading processed/unprocessed wafers from/to all the other respective units in sequence while the wafers are in the one of the units.
申请公布号 US9312155(B2) 申请公布日期 2016.04.12
申请号 US201113154271 申请日期 2011.06.06
申请人 ASM Japan K.K. 发明人 Mori Yukihiro;Yamagishi Takayuki
分类号 B05C11/10;B32B41/00;H01L21/683;H01L21/67;G05B19/418;H01L21/677 主分类号 B05C11/10
代理机构 Snell & Wilmer LLP 代理人 Snell & Wilmer LLP
主权项 1. A wafer-processing apparatus, comprising: eight or ten reactors with identical capacity for processing wafers on the same plane, constituting four or five discrete units, each unit consisting of two reactors arranged with their fronts aligned in a line, each reactor being a single-wafer processing reactor; a wafer-handling chamber including two wafer-handling robot arms, each having at least two end-effectors accessible to the two reactors of each unit simultaneously, said wafer-handling chamber having a polygonal shape having four or five sides corresponding to and being attached to the four or five discrete units, respectively, and one additional side for a load lock chamber, all the sides being disposed on the same plane; a load lock chamber for loading or unloading two wafers simultaneously, said load lock chamber being attached to the one additional side of the wafer-handling chamber, wherein each wafer-handling robot arm is accessible to the load lock chamber; and a sequencer programmed to perform, using the two wafer-handling robot arms wherein one arm is loaded with unprocessed wafers and the other arm is unloaded, a step of unloading processed wafers from one of the units to the other arm and then continuously loading unprocessed wafers to the one of the units from the one arm which then becomes an unloaded arm, wherein the processed wafers are unloaded from the other arm to the load lock chamber and unprocessed wafers are loaded from the load lock chamber to the other arm which then becomes a loaded arm, anda step of processing the wafers in each unit, wherein a ratio of a duration of the unloading and loading step for each unit, which duration is constant for all of the units, to a duration of the step of processing the wafers in each unit, which duration is constant for all of the units, is set at about ⅓ for the four discrete units or at about ¼ for the five discrete units so as to continuously repeat the unloading and loading step in all of the units in preset sequence, involving substantially no waiting time between the unloading and loading step and the processing step in each unit and substantially no full overlap time when all of the units are simultaneously in the processing step, thereby completing one cycle when the unloading and loading step is performed in all of the units, and to continuously repeat the cycle.
地址 Tokyo JP