Conversion apparatus for a residue number arithmetic logic unit

摘要

Methods and systems for conversion of binary data to residue data, and for conversion of residue data to binary data, allow fully extensible operation with related methods and systems for residue number based ALUs, processors and other hardware. In one or more embodiments, a residue to binary data converter apparatus comprises a mixed radix to fixed radix conversion apparatus. In one or more embodiments, a mixed radix converter apparatus assists internal processing of a related residue number based ALU, processor or other hardware.

主权项

1. A mixed radix converter configured to convert a mixed radix number to a fixed radix number:
a first shift register configured to store a plurality of mixed radix digits and to output each of the plurality of mixed radix digit operands in a last in first out sequence; a second shift register configured to store a plurality of digit radix and to output each of the plurality of digit radix in a last in first out sequence; and a plurality of digit processing units configured to perform one or more arithmetic operations on a plurality of mixed radix operands and to generate a fixed radix output, each digit processing unit comprising:
a modulus operand register configured to receive a radix value;an additive operand register configured to receive a carry value;a binary digit accumulator configured to store a fixed radix value;a multiplier configured to multiply the radix value from the modulus operand register with the fixed radix value from the binary digit accumulator to generate an internal product;an adder configured to add the internal product to an additive value from the additive operand register to generate a sum and a carry value;wherein the sum is stored in the binary digit accumulator overwriting the fixed radix value; wherein the plurality of digit processing units are connected in an ordered sequence such that, except for the last digit processing unit in the ordered sequence, the adder of one digit processing unit is in communication with the additive operand register of a subsequent digit processing unit to transmit the carry value from one digit processing unit to the next; and wherein a fixed radix representation of the mixed radix number comprises the sums stored in the binary digit accumulators of the plurality of digit processing units store.