发明名称 Method for producing display panel, and display panel
摘要 In a method for producing a display panel, a base substrate having an upper surface on which an electrode is located is prepared. A first layer having a first opening overlapping with the electrode in plan-view is formed on the base substrate. A second layer having a second opening overlapping with the first opening in plan-view is formed on the first layer. The second opening has a smaller area than the first opening in plan-view. A wiring layer is formed in the first opening and the second opening, in contact with the electrode. The second layer includes a portion located on an upper surface of the first layer and a portion located in the first opening. The portion of the second layer located in the first opening covers an internal side surface of the first layer located around the first opening.
申请公布号 US9312283(B2) 申请公布日期 2016.04.12
申请号 US201414217817 申请日期 2014.03.18
申请人 JOLED INC. 发明人 Nanai Norishige;Ukeda Takaaki;Miyamoto Akihito
分类号 H01L27/12;H01L27/32 主分类号 H01L27/12
代理机构 Greenblum & Bernstein, P.L.C. 代理人 Greenblum & Bernstein, P.L.C.
主权项 1. A transistor array comprising: a base substrate; a gate electrode located on an upper surface of the base substrate; a gate insulating film located on the base substrate and having a first opening therein at a position overlapping with the gate electrode in plan-view; a bank layer located on the gate insulating film and having a second opening therein at a position overlapping with the first opening in plan-view, the second opening having a smaller area than the first opening in plan-view; and a wiring layer located in the first opening and the second opening, in contact with the gate electrode, wherein the bank layer includes a portion located on an upper surface of the gate insulating film and a portion located in the first opening, and the portion of the bank layer located in the first opening covers an internal side surface of the gate insulating film located around the first opening.
地址 Tokyo JP
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