发明名称 |
DC-DC converter efficiency improvement and area reduction using a novel switching technique |
摘要 |
A control logic of a switched DC-to-DC converter allows continuous switching to bring the DC-to-DC converter to a final output value during a startup phase, it allows skipping of clock switching pulses if they are not needed and allows burst mode of switching pulses dependent on a load applied to the output voltage of the DC-to-DC converter. No digital or analog regulator is required for the control logic. |
申请公布号 |
US9312758(B2) |
申请公布日期 |
2016.04.12 |
申请号 |
US201012661515 |
申请日期 |
2010.03.18 |
申请人 |
Dialog Semiconductor GmbH |
发明人 |
Tyrrell Julian;Minhas Biren;Hedley Anna;Levine Stuart |
分类号 |
H02M3/156;H02M3/07 |
主分类号 |
H02M3/156 |
代理机构 |
Saile Ackerman LLC |
代理人 |
Saile Ackerman LLC ;Ackerman Stephen B. |
主权项 |
1. A method to improve the efficiency of a switched DC-to-DC converter, comprising the following steps:
(1) providing the switched-mode DC-to-DC converter comprising a charge pump and a control logic capable of controlling clock pulses of the DC-to-DC converter; (2) applying continuous switching pulses initiated by the control logic to the DC-to-DC converter during a startup phase for a predetermined period of time to reach a desired output voltage; (3) skipping cycles of the switching pulses if they are not needed during an operational phase wherein a skip control is determined by an expected load current demand on a charge pump output, wherein the expected load current is known by the control logic controlling a switching of a load on the charge pump, providing a forecast when the charge pump load will change, wherein the forecast is based on load switching transients; and (4) applying a number of burst switching pulses, wherein a burst control is determined by the expected load current demand on the charge pump output;wherein a stream of continuous pulses is generated for a fixed period of time; which, given a ratio of a capacitance of switched capacitor size to an output storage capacitance, determines the time taken to reach an un-loaded output voltage target. |
地址 |
Kirchheim/Teck-Nabern DE |