发明名称 |
CONFLICT DETECTION FOR SELF-ALIGNED MULTIPLE PATTERNING COMPLIANCE |
摘要 |
Among other things, one or more techniques and systems for performing design layout are provided. An initial design layout is associated with an electrical component, such as a standard cell. A conflict graph is generated based upon the initial design layout. The conflict graph comprises one or more nodes, representing polygons within the initial design layout, connected by one or more edges. A same-process edge specifies that two nodes are to be generated by the same pattern process, while a different-process edge specified that two nodes are to be generated by different pattern processes, such as a mandrel pattern process and a passive fill pattern process. The conflict graph is evaluated to identify a conflict, such as a self-aligned multiple pattering (SAMP) conflict, associated with the initial design layout. The conflict is visually displayed so that the initial design layout can be modified to resolve the conflict. |
申请公布号 |
US2016098513(A1) |
申请公布日期 |
2016.04.07 |
申请号 |
US201514967481 |
申请日期 |
2015.12.14 |
申请人 |
Taiwan Semiconductor Manufacturing Company Limited |
发明人 |
Hsu Chin-Chang;Lin HungLung;Shen Ying-Yu;Yang Wen-Ju;Hsieh Ken-Hsien |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
1. A system for performing design layout, comprising:
a graph component configured to:
receive an initial design layout associated with an electrical component; andgenerate a conflict graph from the initial design layout, the conflict graph comprising one or more nodes coupled by one or more edges, an edge, between a first node and a second node, comprising an edge type identified based upon a space, between a first polygon represented by the first node and a second polygon represented by the second node, corresponding to a spacing threshold range assigned to the edge type; and a conflict detection component configured to:
for respective loops within the conflict graph, identify a conflict associated with the initial design layout based upon a loop comprising an odd number of nodes. |
地址 |
Hsin-Chu TW |