发明名称 Cap and Substrate Electrical Connection at Wafer Level
摘要 A cap and substrate having an electrical connection at a wafer level includes providing a substrate and forming an electrically conductive ground structure in the substrate and electrically coupled to the substrate. An electrically conductive path to the ground structure is formed in the substrate. A top cap is then provided, wherein the top cap includes an electrically conductive surface. The top cap is bonded to the substrate so that the electrically conductive surface of the top cap is electrically coupled to the path to the ground structure.
申请公布号 US2016096722(A1) 申请公布日期 2016.04.07
申请号 US201514968020 申请日期 2015.12.14
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Peng Jung-Huei
分类号 B81B7/00 主分类号 B81B7/00
代理机构 代理人
主权项 1. A device comprising: an electrically conductive ground structure disposed in a first substrate, wherein the electrically conductive ground structure extends completely through the first substrate to a second substrate such that the electrically conductive ground structure physically contacts the second substrate; a conductive layer interposed between the first substrate and the second substrate, wherein the conductive layer physically contacts the conductive ground structure; and a third substrate eclectically coupled to the second substrate through the ground structure.
地址 Hsin-Chu TW