| 摘要 |
PROBLEM TO BE SOLVED: To provide a PLL circuit in which phase noise is reduced by a simple circuit with satisfactory characteristics.SOLUTION: The PLL circuit includes: a frequency divider which frequency-divides an oscillation signal to generate a frequency-divided signal of which the term is T/M (M: an integer equal to or greater than 2); a phase comparator for generating M pieces of reference signals which are deviated for the unit of a predetermined delay time by delaying a reference signal having a term T successively for the unit of the predetermined delay time, and generating an exclusive OR of the M pieces of reference signals and the frequency-divided signal; a loop filter which inputs the exclusive OR and generates a voltage signal; a voltage controlled oscillator which is oscillated in a frequency corresponding to the voltage signal, thereby generating an oscillation signal; and a control circuit which adjusts the predetermined delay time equal to T/2M on the basis of an exclusive OR between at least two of M pieces of reference signals.SELECTED DRAWING: Figure 2 |
