发明名称 SEMICONDUCTOR WAFER INCLUDING A MONOCRYSTALLINE SEMICONDUCTOR LAYER SPACED APART FROM A POLY TEMPLATE LAYER
摘要 A semiconductor wafer can include a substrate, a poly template layer, and a semiconductor layer. The substrate has a central region and an edge region, the poly template layer is disposed along a peripheral edge of the substrate, and a semiconductor layer over the central region, wherein the semiconductor layer is monocrystalline. In an embodiment, the poly template layer and the monocrystalline layer are laterally spaced apart from each other by an intermediate region. In another embodiment, the semiconductor layer can include aluminum. A process of forming the substrate can include forming a patterned poly template layer within the edge region and forming a semiconductor layer over the primary surface. Another process of forming the substrate can include forming a semiconductor layer over the primary surface and removing a portion of the semiconductor layer so that the semiconductor layer is spaced apart from an edge of the substrate.
申请公布号 US2016099319(A1) 申请公布日期 2016.04.07
申请号 US201514966649 申请日期 2015.12.11
申请人 Semiconductor Components Industries, LLC 发明人 ZIAD Hocine Bouzid;MOENS Peter;DE BACKER Eddy
分类号 H01L29/205;H01L29/06;H01L29/778;H01L29/16 主分类号 H01L29/205
代理机构 代理人
主权项 1. A semiconductor wafer comprising: a substrate having a primary surface that has a central region, an edge region, an intermediate region disposed between the central region and the edge region; a poly template layer disposed along a peripheral edge of the substrate: and a semiconductor layer, wherein: a first portion of the semiconductor layer is monocrystalline and lies within the central region,a second portion of the semiconductor layer is polycrystalline and lies along the side surface,the first portion of the semiconductor layer is laterally spaced apart from the second portion of the semiconductor layer, andthe intermediate region is disposed between the first and second portions of the semiconductor layer and does not include any portion of each of the semiconductor layer and the poly template layer.
地址 Phoenix AZ US