发明名称 |
SYSTEMS AND METHODS FOR DQS GATING |
摘要 |
Systems and methods for timing read operations with a memory device are provided. A timing signal is received from the memory device at a gating circuit. The timing signal is passed through as a filtered timing signal during a gating window. The gating window is configured to open the gating window based on a control signal and to close the gating window based on a falling edge of the timing signal. The falling edge is determined based on a counter that is triggered to begin counting by the control signal. The control signal is generated at a timing control circuit after receiving a read request from a memory controller. The timing control circuit is configured to delay generation of the control signal to cause the gating window to open during a preamble portion of the timing signal. |
申请公布号 |
EP2845113(B1) |
申请公布日期 |
2016.04.06 |
申请号 |
EP20130734164 |
申请日期 |
2013.04.30 |
申请人 |
MARVELL WORLD TRADE LTD. |
发明人 |
ZHU, JUN;CAO, JOSEPH, JUN;LU, SHENG |
分类号 |
G06F13/16;G06F13/42 |
主分类号 |
G06F13/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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