| 摘要 |
An n - drift region (2) is disposed on the front surface of an n + semiconductor substrate (1) composed of a wide band gap semiconductor. A p-channel region (3) is selectively disposed on the surface layer of the n - drift region (2). A high-concentration p + base region (4) is disposed so as to adjoin the lower portion of the p-channel region (3) inside the n - drift region (2). Inside the high-concentration p + base region (4), an n + high-concentration region (11) is selectively disposed at the n + semiconductor substrate (1) side. The n + high-concentration region (11) has a stripe-shaped planar layout extending to the direction that the high-concentration p + base regions (4) line up. The n + high-concentration region (11) adjoins a JFET region at one end portion in longitudinal direction of the stripe. Further, the n + semiconductor substrate (1) side of the n + high-concentration region (11) adjoins the part sandwiched between the high-concentration p + base region (4) and the n + semiconductor substrate (1) in the n - drift region (2). |
