| 摘要 |
An image processing system is provided as a system on chip (SoC) or as part of a larger image processing system. The image processor includes a codec module, 200, a memory controller, and in some examples may also function with a dithering unit, 220, a display controller, 300, a display, and/or an image sensor. The image processor processes, stores and reads image data using embedded and/or external memory. The image data is comprised of a plurality of pixels, each of which includes first and second sets of bits that can be separately or simultaneously accessed in first and second region of the memory using one or more addresses. The first set of bits may correspond to the more significant bits (MSB) of each pixel and the second set of bits may correspond to the less significant bits (LSB). In some examples the number of bits in each of the first and second set of bits may be selected according to the width of a used data bus and/or features of a peripheral device connected to the image processor such as a display. |
