发明名称 Signal generating device
摘要 A signal generating device includes a first digital filter unit outputting a first interpolated signal by interpolating an input signal, a second digital filter unit outputting a second interpolated signal by interpolating the first interpolated signal, a phase calculation unit calculating a phase of a digital signal, a phase-accuracy conversion unit calculating first phase signal and second phase signal, a first memory storing filter coefficients, a first coefficient readout unit reading filter coefficients from the first memory and switching filter coefficients of the first digital filter unit, a phase-error calculation unit calculating a phase error signal, a second memory storing filter coefficients, a second coefficient readout unit reading filter coefficients from the second memory, and a gain normalization unit normalizing a gain of the filter coefficients to maintain a constant sum of the filter coefficients and switching filter coefficients of the second digital filter unit.
申请公布号 US9306728(B2) 申请公布日期 2016.04.05
申请号 US201314418254 申请日期 2013.07.31
申请人 Mitsubishi Electric Corporation 发明人 Iura Hiroki;Tomitsuka Koji
分类号 H04L7/00;H03H17/02;H03H17/06;H04L7/08 主分类号 H04L7/00
代理机构 Oblon, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, McClelland, Maier & Neustadt, L.L.P.
主权项 1. A signal generating device comprising: a first digital filter that outputs a first interpolated signal by interpolating an input signal; a second digital filter that outputs a second interpolated signal by interpolating the first interpolated signal; a phase calculation unit that calculates a phase of a digital signal that changes for each output sampling cycle of the first and second digital filters; a phase-accuracy conversion unit that calculates a first phase signal and a second phase signal on a basis of the phase of the digital signal; a first memory that stores therein a first filter coefficient of the first digital filter; a first coefficient readout unit that reads out the first filter coefficient from the first memory on a basis of the first phase signal and switches the first filter coefficient of the first digital filter; a phase-error calculation unit that calculates a phase error signal on a basis of the second phase signal; a second memory that stores therein a second filter coefficient of the second digital filter; a second coefficient readout unit that reads out the second filter coefficient from the second memory on a basis of the phase error signal; and a gain normalization unit that switches the second filter coefficient of the second digital filter on a basis of the second filter coefficient read out from the second memory in the second coefficient readout unit.
地址 Chiyoda-ku JP