发明名称 |
Controlling on-die termination in a nonvolatile memory |
摘要 |
A memory controller transmits a plurality of control values to a non-volatile memory device together with one or more programming commands. The plurality of control values include (i) a first control value that specifies a first termination resistance to be applied to an I/O node of the non-volatile memory device during an interval in which a first data signal transmitted on a bidirectional signaling line coupled to the I/O node is to be received within the non-volatile memory device and (ii) a second control value that specifies a second termination resistance to be applied to the I/O node during an interval in which a second data signal is transmitted on the bidirectional signaling line by another non-volatile memory device. |
申请公布号 |
US9306568(B2) |
申请公布日期 |
2016.04.05 |
申请号 |
US201514728917 |
申请日期 |
2015.06.02 |
申请人 |
Rambus Inc. |
发明人 |
Oh Kyung Suk;Shaeffer Ian P. |
分类号 |
H03K17/16;H03K19/00;G06F13/40;G11C11/4093;H03K19/0175;G11C11/401;G11C11/419;G11C16/26;G11C11/41;G11C11/4063;G11C11/413;G11C11/417;G11C16/06;G11C16/32 |
主分类号 |
H03K17/16 |
代理机构 |
|
代理人 |
Shemwell Charles |
主权项 |
1. A method of controlling a non-volatile memory device, the method comprising:
transmitting one or more commands to a first non-volatile memory device that instruct the first non-volatile memory device to store a plurality of control values within one or more programmable registers of the first non-volatile memory device; transmitting the plurality of control values to the first non-volatile memory device, including transmitting (i) a first control value that specifies a first termination resistance to be applied to an input/output (I/O) node of the first non-volatile memory device during an interval in which a first data signal transmitted on a bidirectional signaling line coupled to the I/O node is to be received within the first non-volatile memory device via the I/O node, and (ii) a second control value that specifies a second termination resistance to be applied to the I/O node during an interval in which a second data signal is transmitted on the bidirectional signaling line by a second non-volatile memory device. |
地址 |
Sunnyvale CA US |