主权项 |
1. A circuit, comprising:
an analog signal input circuit configured to receive and amplify a differential analog signal and output an amplified differential analog signal; at least two integrating circuits coupled to output terminals of the analog signal input unit and configured to integrate the amplified differential analog signal; at least two pulse width modulating units coupled respectively to output terminals of the integrating units and configured to generate pulse signals with corresponding pulse width based on an integrated analog signal output from the corresponding integrating unit; wherein each the integrating units comprises:
a first amplifier having a positive input terminal, a negative input terminal and an output terminal, wherein the negative input terminal of the integrating unit is coupled to the output terminal of the integrating unit via a capacitor, and the positive input terminal of the integrating unit is configured to receive a first reference signal;a regulator configured to generate an output coupled to the output terminal of the first amplifier and limit the output of the integrating unit to the first reference signal;a control module coupled to the first amplifier and the regulator and configured to control operation of the first amplifier and the regulator based on a mode switch signal, wherein when the mode switch signal switches from an un-mute state to a mute state, the control module is configured to gradually disable the first amplifier and enable the regulator to gradually convert output of the integrating unit to the first reference signal, and when the mode switch signal switches from the mute state to the un-mute state, the control module is configured to gradually enable the first amplifier and disable the regulator to gradually convert the output of the integrating unit to the output of the first amplifier. |