| 摘要 |
An objective of the present invention is to reduce electric power consumption of an analog-digital conversion circuit. An analog potential acquired by a sensor or the like is maintained in a sample hold circuit including a transistor having an extremely low off-current. In the sample hold circuit, the analog potential is maintained at a node which enables charges to be held by turning the transistor off. Power supply to a buffer circuit or the like, which is included in the sample hold circuit, is stopped and a decrease in power consumption is achieved. Also, potential is maintained at each node, so the transistor having an extremely low off-current is provided to a node for maintaining potential of a comparator, a successive approximation register, and a digital-analog converting circuit, etc., and power supply to each circuit is stopped, thereby achieving a decrease in power consumption. |
