Delay locked loop, method of operating the same, and memory system including the same

摘要

A delay locked loop (DLL) is provided. The DLL includes a delay line, a phase detector, a delay line control unit, and a DLL controller. The delay line outputs an output clock by delaying an input clock by a first time on the basis of a select value. The phase detector detects a phase of the output clock. The delay line control unit determines a select value so that the first time corresponds to n periods of the input clock on the basis of the detected phase and an initial select value. The DLL controller provides the initial select value to the delay line control unit. The DLL controller updates the initial select value according to a change of a frequency of the input clock, and to provide the updated initial select value to the delay line control unit.

主权项

1. A delay locked loop comprising:
a delay line configured to output an output clock by delaying an input clock by a first time on the basis of a select value; a phase detector configured to detect a phase of the output clock; a delay line control unit configured to determine the select value so that the first time corresponds to n periods of the input clock on the basis of the detected phase and an initial select value, wherein n is a positive integer; and a delay locked loop controller configured to provide the initial select value to the delay line control unit, wherein the delay locked loop controller is configured to update the initial select value according to a change of a frequency of the input clock, and to provide the updated initial select value to the delay line control unit, and wherein the delay line control unit is configured to determine the select value on the basis of the updated initial select value.