发明名称 Dimension-controlled via formation processing
摘要 Methods are provided for dimension-controlled via formation over a circuit structure, including over multiple adjacent conductive structures. The method(s) includes, for instance, providing a patterned multi-layer stack structure above the circuit structure, the stack structure including at least one layer, and a pattern transfer layer above the at least one layer, the pattern transfer layer being patterned with at least one via opening; providing a sidewall spacer layer within the at least one via opening to form at least one dimension-controlled via opening; and etching through the at least one layer of the stack structure using the at least one dimension-controlled via opening to facilitate providing the via(s) over the circuit structure. In one implementation, the stack structure includes a trench-opening within a patterned hard mask layer disposed between a dielectric layer and a planarization layer, and the via(s) is partially self-aligned to the trench.
申请公布号 US9305832(B2) 申请公布日期 2016.04.05
申请号 US201414315659 申请日期 2014.06.26
申请人 GLOBALFOUNDRIES INC. 发明人 Hu Xiang;Ren Yuping;Bei Duohui;Gu Sipeng;Liu Huang
分类号 H01L21/308;H01L21/768;H01L21/033;H01L23/538;H01L21/311;H01L21/02 主分类号 H01L21/308
代理机构 Heslin Rothenberg Farley & Mesiti P.C. 代理人 Heslin Rothenberg Farley & Mesiti P.C. ;Mesiti, Esq. Nicholas
主权项 1. A method comprising: forming at least one via over a circuit structure, the forming comprising: providing a patterned multi-layer stack structure above the circuit structure, the patterned multi-layer stack structure comprising at least one layer, and a pattern transfer layer above the at least one layer, the pattern transfer layer being patterned with at least one via opening therein;providing a sidewall spacer layer within the at least one via opening to form at least one dimension-controlled via opening;prior to providing the sidewall spacer, etching partially into the at least one layer using the pattern transfer layer as a mask to extend the at least one via opening into the at least one layer; andetching through at least the at least one layer of the patterned multi-layer stack structure using the at least one dimension-controlled via opening to facilitate providing the at least one via over the circuit structure, wherein the etching partially into the at least one layer is constrained to a depth which ensures that the subsequent etching through the at least the one layer of the patterned multi-layer stack structure consumes the sidewall spacer within the at least one via opening.
地址 Grand Cayman KY