发明名称 |
Semiconductor device including STI structure and fabrication method |
摘要 |
Semiconductor devices including STI structures and their fabrication methods are provided. A mask layer is provided on a semiconductor substrate and patterned to form an opening in the mask layer to expose a surface portion of the semiconductor substrate. A trench is then formed in the semiconductor substrate by etching along the opening. A first dielectric layer is formed in the trench and has a top surface lower than a top surface of the semiconductor substrate to provide an uncovered sidewall surface of the trench in the semiconductor substrate. An epitaxial layer is formed on the uncovered sidewall surface of the trench in the semiconductor substrate. The epitaxial layer includes a spacing to expose a surface portion of the first dielectric layer. A second dielectric layer is formed on the exposed surface portion of the first dielectric layer to fill the spacing formed in the epitaxial layer. |
申请公布号 |
US9305823(B2) |
申请公布日期 |
2016.04.05 |
申请号 |
US201414207678 |
申请日期 |
2014.03.13 |
申请人 |
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION |
发明人 |
Zhao Meng |
分类号 |
H01L21/762;H01L29/10 |
主分类号 |
H01L21/762 |
代理机构 |
Anova Law Group, PLLC |
代理人 |
Anova Law Group, PLLC |
主权项 |
1. A method of forming a transistor device, comprising:
providing a mask layer on a semiconductor substrate; patterning the mask layer to form an opening in the mask layer to expose a surface portion of the semiconductor substrate; forming a trench in the semiconductor substrate by etching along the opening; forming a first dielectric layer in the trench, wherein the first dielectric layer has a top surface lower than a top surface of the semiconductor substrate to provide an uncovered sidewall surface of the trench in the semiconductor substrate; forming an epitaxial layer on the uncovered sidewall surface of the trench in the semiconductor substrate and on the first dielectric layer, wherein the epitaxial layer includes a spacing to expose a surface portion of the first dielectric layer; and forming a second dielectric layer on the exposed surface portion of the first dielectric layer to fill the spacing in the epitaxial layer, wherein: the first and second dielectric layers form an isolation structure for the transistor device, and a channel width of the transistor device is a total width including a width of a portion of the semiconductor substrate located between neighboring isolation structures plus a total width of the epitaxial layer on both sides of the isolation structure. |
地址 |
Shanghai CN |