| 发明名称 | Wiring substrate and semiconductor device | ||
| 摘要 | A wiring substrate includes a first multi-layer wiring layer including an insulating layer formed of a non-photosensitive resin, a plurality of external connection pads formed on an upper face side of the first multi-layer wiring layer, and a second multi-layer wiring layer formed on the first multi-layer wiring layer, the second multi-layer wiring layer including an insulating layer formed of a photosensitive resin, the second multi-layer wiring layer having a wiring pitch narrower than the wiring pitch of the first multi-layer wiring layer. The external connection pads are exposed from the insulating layer of the second multi-layer wiring layer. | ||
| 申请公布号 | US9307641(B2) | 申请公布日期 | 2016.04.05 |
| 申请号 | US201514633525 | 申请日期 | 2015.02.27 |
| 申请人 | SHINKO ELECTRIC INDUSTRIES CO., LTD. | 发明人 | Oi Kiyoshi;Kurihara Takashi |
| 分类号 | H01L23/12;H05K1/11;H01L23/498;H01L23/00;H01L25/065;H05K1/02 | 主分类号 | H01L23/12 |
| 代理机构 | Kratz, Quintos & Hanson, LLP | 代理人 | Kratz, Quintos & Hanson, LLP |
| 主权项 | 1. A wiring substrate, comprising: a first multi-layer wiring layer including an insulating layer formed of a non-photosensitive resin; a plurality of external connection pads formed on an upper face side of the first multi-layer wiring layer; and a second multi-layer wiring layer formed on the first multi-layer wiring layer, the second multi-layer wiring layer including an insulating layer formed of a photosensitive resin, the second multi-layer wiring layer having a wiring pitch narrower than a wiring pitch of the first multi-layer wiring layer, wherein the insulating layer of the second multi-layer wiring layer is formed to be opened such that the plurality of external connection pads are exposed. | ||
| 地址 | Nagano-shi JP | ||