发明名称 |
ESD protection circuit |
摘要 |
An electrostatic discharge (ESD) protection circuit is provided. The ESD protection circuit includes a first NMOS transistor coupled to a power line, a second NMOS transistor coupled between the first transistor and a ground, a detection unit, providing a detection signal when an ESD event occurs at the power line, and a trigger unit, turning on the second NMOS transistor and the first NMOS transistor in sequence in response to the detection signal, such that a discharge path is formed from the power line to the ground via the first and second NMOS transistors. The trigger unit includes a first PMOS transistor coupled between the power line and a gate of the second NMOS transistor, a fourth resistor, and a second PMOS transistor, having a gate coupled to the cathode of the diode for receiving the detection signal. |
申请公布号 |
US9305915(B2) |
申请公布日期 |
2016.04.05 |
申请号 |
US201514635255 |
申请日期 |
2015.03.02 |
申请人 |
MEDIATEK INC. |
发明人 |
Chuang Chien-Hui |
分类号 |
H02H9/00;H01L27/02;H03K19/003 |
主分类号 |
H02H9/00 |
代理机构 |
McClure, Qualey & Rodack, LLP |
代理人 |
McClure, Qualey & Rodack, LLP |
主权项 |
1. An electrostatic discharge (ESD) protection circuit, comprising:
a first NMOS transistor coupled to a power line; a second NMOS transistor coupled between the first transistor and a ground; a detection unit, providing a detection signal when an ESD event occurs at the power line; and a trigger unit, turning on the second NMOS transistor and the first NMOS transistor in sequence in response to the detection signal, such that a discharge path is formed from the power line to the ground via the first and second NMOS transistors, wherein the trigger unit further comprises: a first PMOS transistor coupled between the power line and a gate of the second NMOS transistor, having a gate coupled to the cathode of the diode for receiving the detection signal; a fourth resistor coupled between the gate of the second NMOS transistor and the ground; and a second PMOS transistor coupled between the gates of the first and second NMOS transistors, having a gate coupled to the cathode of the diode for receiving the detection signal. |
地址 |
Hsin-Chu TW |