发明名称 |
Duty cycle adjustment with error resiliency |
摘要 |
The present disclosure regards adjusting a duty cycle, which includes generating a duty cycle signal having a voltage representing a duty cycle of a clock signal; adjusting a reference voltage generated by an adjustable reference voltage generator to match the duty cycle signal to produce a first matched value; inverting voltage sources of the reference voltage generator; adjusting, while the voltage sources are inverted, the reference voltage to produce a second matched value; and calculating a duty cycle value based on the first and second matched values. |
申请公布号 |
US9306547(B2) |
申请公布日期 |
2016.04.05 |
申请号 |
US201314103940 |
申请日期 |
2013.12.12 |
申请人 |
International Business Machines Corporation |
发明人 |
Arp Andreas;Cilek Fatih;Hutzl Guenther;Koch Michael;Menolfi Christian I.;Nissler Dieter;Ringe Matthias |
分类号 |
H03K3/017;H03K5/04;H03K7/08;H03K5/156 |
主分类号 |
H03K3/017 |
代理机构 |
Scully, Scott, Murphy & Presser, P.C. |
代理人 |
Scully, Scott, Murphy & Presser, P.C. |
主权项 |
1. A method for adjusting a duty cycle, comprising:
generating a duty cycle signal having a voltage representing a duty cycle of a clock signal; generating, using a reference voltage generator, in response to a reference control signal, a reference voltage from voltage sources applied to the reference voltage generator; and comparing, using the comparator, the reference voltage and the duty cycle signal; adjusting, using a clock evaluation control circuit, the reference voltage generated by the adjustable reference voltage generator to match the duty cycle signal to produce a first matched value; inverting supply voltage sources input to the reference voltage generator in response to an applied reference polarity signal; adjusting, using the clock evaluation control circuit, while the supply voltage sources are inverted, the reference voltage to match the duty cycle signal to produce a second matched value; and swapping comparator inputs into the comparator in response to an applied comparator polarity signal; and while the comparator inputs are swapped:
adjusting, using the clock evaluation control circuit, the reference voltage generated by the adjustable reference voltage generator to match the duty cycle signal to produce a third matched value;inverting the supply voltage sources of the reference voltage generator;adjusting, using the clock evaluation control circuit, while the supply voltage sources are inverted, the reference voltage to produce a fourth matched value; andcalculating a duty cycle value based on the first, second, third, and fourth matched values. |
地址 |
Armonk NY US |