发明名称 Semiconductor device
摘要 A semiconductor device has a body layer disposed in a semiconductor substrate, cell regions arranged around a surface layer part of the body layer, and trenches arranged in a grid pattern for separating the cell regions from each other. A gate insulating film covers inner walls of the first trenches and an inner wall of the second trench, and a gate electrode is filled in the first trenches and the second trench covered by the gate insulating film. A cell circumferential region is disposed to surround an outer side of the second trench. An interlayer insulating film is disposed on the cell regions, the first trenches, and the second trench. A gate contact hole is disposed in the interlayer insulating film at an intersection of the first trenches arranged in the grid pattern. A gate wiring is connected to the gate electrode via the gate contact hole.
申请公布号 US9306062(B2) 申请公布日期 2016.04.05
申请号 US201314033892 申请日期 2013.09.23
申请人 SEIKO INSTRUMENTS INC. 发明人 Kobayashi Naoto
分类号 H01L29/78;H01L29/423 主分类号 H01L29/78
代理机构 Adams & Wilks 代理人 Adams & Wilks
主权项 1. A semiconductor device, comprising: a semiconductor substrate; a body layer disposed in the semiconductor substrate; a plurality of cell regions, each comprising a source region arranged around a surface layer part of the body layer; first trenches arranged in a grid pattern and having a constant width, for separating the plurality of cell regions from each other; a second trench disposed at an outermost circumference of the plurality of cell regions; a gate insulating film for covering inner walls of the first trenches and an inner wall of the second trench; a gate electrode that fills the first trenches and the second trench covered by the gate insulating film; a cell circumferential region disposed to surround an outer side of the second trench; an interlayer insulating film disposed on the plurality of cell regions, the first trenches, and the second trench; a gate contact hole disposed in the interlayer insulating film at an intersection of the first trenches arranged in the grid pattern, the gate contact hole not being provided on the second trench; and a gate wiring connected to the gate electrode via the gate contact hole.
地址 JP