发明名称 |
SYSTEM AND METHOD TO ACCESS PORTION OF LEVEL-TWO MEMORY AND LEVEL-ONE MEMORY |
摘要 |
PROBLEM TO BE SOLVED: To provide an apparatus for accessing data from a portion of a level-two memory or data from a level-one memory.SOLUTION: An apparatus 100 includes a level-one cache 104 and a level-two memory 112. A first portion 108 of the level-two memory is coupled to an input port and is addressable in parallel with the level-one cache. The apparatus comprises control means configured to: determine a value of a status bit associated with the input port in response to receiving a specific memory access request; and route the specific memory access request to the first portion of the level-two memory via the input port.SELECTED DRAWING: Figure 1 |
申请公布号 |
JP2016042370(A) |
申请公布日期 |
2016.03.31 |
申请号 |
JP20150216564 |
申请日期 |
2015.11.04 |
申请人 |
QUALCOMM INC |
发明人 |
SURESH K VENKUMAHANTI;CHRISTOPHER EDWARD KUBE;LUCIAN CODRESCU |
分类号 |
G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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