| 摘要 |
PROBLEM TO BE SOLVED: To provide a fully differential switched capacitor circuit in which input variation of a fully differential operational amplifier can be suppressed when an in-phase input signal is inputted, while suppressing increase in the chip size or current consumption.SOLUTION: A first sampling capacitor Cs1 is connected with a first input terminal 11 to which a positive signal is inputted, and a second sampling capacitor Cs2 is connected with a second input terminal 12 to which a negative signal is inputted. A fully differential computing unit 20 includes an inverted input terminal (-) for connection with the first input terminal 11, and a non-inverted input terminal (+) for connection with the second input terminal 12, and has common feedback. A third switch SW3 short-circuits and floats the input side of the first sampling capacitor Cs1, and the input side of the second sampling capacitor Cs2.SELECTED DRAWING: Figure 4 |
