发明名称 TRANSMISSION LINE DRIVER CIRCUIT FOR AUTOMATICALLY CALIBRATING IMPEDANCE MATCHING
摘要 A transmission line driver circuit includes: a transmission line driving amplifier having a first transmission terminal and a second transmission terminal; a first signal node; a second signal node; a first adjustable resistor positioned between the first transmission terminal and the first signal node; a second adjustable resistor positioned between the second transmission terminal and the second signal node; a first voltage difference generating circuit coupled with two terminals of the first adjustable resistor to generate a first voltage difference value; a second voltage difference generating circuit coupled with two terminals of the second adjustable resistor to generate a second voltage difference value; sample-and-hold circuits for generating sampled signals according to the first voltage difference value and the second voltage difference value; a comparing circuit for comparing the sampled signals; and an adjusting circuit for adjusting resistance of the first and/or second adjustable resistors according to the comparing result.
申请公布号 US2016094196(A1) 申请公布日期 2016.03.31
申请号 US201514842305 申请日期 2015.09.01
申请人 Realtek Semiconductor Corp. 发明人 LEE Chao-Cheng;LIN Jian-Ru;WANG Shih-Wei;KE Guan-Hong
分类号 H03H7/40 主分类号 H03H7/40
代理机构 代理人
主权项 1. A transmission line driver circuit for automatically calibrating impedance matching, comprising: a transmission line driving amplifier comprising a first transmission terminal and a second transmission terminal for providing a pair of differential transmission signals; a first signal node for coupling with a first load-end signal node of an equivalent load circuit; a second signal node for coupling with a second load-end signal node of the equivalent load circuit; a first adjustable resistor positioned on a signal path between the first transmission terminal and the first signal node; a second adjustable resistor positioned on a signal path between the second transmission terminal and the second signal node; a first signal difference generating circuit, coupled with two terminals of the first adjustable resistor, configured to operably generate a first voltage difference value; a second signal difference generating circuit, coupled with two terminals of the second adjustable resistor, configured to operably generate a second voltage difference value; a first sample-and-hold circuit, coupled with the first signal difference generating circuit, configured to operably conduct a sample-and-hold operation on the first voltage difference value to generate a first sampled signal; a second sample-and-hold circuit, coupled with the second signal difference generating circuit, configured to operably conduct a sample-and-hold operation on the second voltage difference value to generate a second sampled signal; a comparing circuit, coupled with the first sample-and-hold circuit and the second sample-and-hold circuit, configured to operably compare the first sampled signal with the second sampled signal; and an adjusting circuit, coupled with the first adjustable resistor, the second adjustable resistor, and the comparing circuit, configured to operably adjust resistance of at least one of the first adjustable resistor and the second adjustable resistor according to a comparing result of the comparing circuit.
地址 Hsinchu TW