SOURCE DRIVER AND OPERATING METHOD THEREOF

摘要

A source driver circuit is provided which includes a plurality of digital multi-spread (hereinafter referred to as “DMS”) blocks configured to generate DMS signals for controlling an output timing of a data signal to be transmitted to a display panel from a plurality of clocks which are delayed as much as a reference period one another. Each DMS block includes a plurality of sub blocks. Each of the sub blocks includes an enable signal generator and a delay unit. The enable signal generator generates an enable signal for outputting target DMS signals of the DMS signals using clocks selected from the plurality of clocks. The delay unit delays the DMS signals such that the DMS signals are sequentially delayed by the reference period.

主权项

1. A source driver circuit, comprising:
a plurality of main circuits configured to generate signals for controlling an output timing of a data signal to be transmitted to a display panel, wherein the signals are generated from a plurality of clocks which are delayed by a reference period from one another, each main circuit including a plurality of sub circuits, wherein each sub circuit includes: an enable signal generator configured to generate an enable signal for outputting a subset of the signals using clocks selected from the plurality of clocks; and a delay unit configured to delay the subset of signals such that the subset of signals are sequentially delayed by the reference period, and wherein each sub circuit outputs the subset of signals in response to the enable signal.