OVERVOLTAGE PROTECTION FOR A FINE GRAINED NEGATIVE WORDLINE SCHEME

摘要

A fine grained negative wordline scheme for SRAM memories is disclosed. The scheme includes a circuit having a static random access memory (SRAM) cell including at least a wordline coupled to a plurality of NFETs of a transistor array. The circuit further includes a wordline driver including a plurality of inverters coupled between a wordline group decode node, a power supply and the wordline. Overvoltage on the wordline driver and NFETs of the SRAM cell are eliminated by applying a power gating mode and lowering the power supply voltage.

主权项

1. A circuit comprising:
a static random access memory (SRAM) cell comprising at least a wordline coupled to a plurality of NFETs of a transistor array; and a wordline driver comprising a plurality of inverters coupled between a wordline group decode node, a power supply and the wordline, wherein overvoltage on the wordline driver and NFETs of the SRAM cell are eliminated by applying a power gating mode and lowering the power supply voltage, wherein: the plurality of inverters of the wordline driver each include a PFET device and an NFET device; the PFET devices are coupled to the power supply; the NFET device of a first inverter of the plurality of inverters is coupled to a wordline pull down network and its source is coupled to the wordline; and a second inverter of the plurality of inverters is coupled to the wordline group decode node, and, in a powered up state with unselected wordline:
the wordline pull down network comprises a first NFET device in an OFF state and a second NFET device in an ON state feeding to GND;the PFET devices of the plurality of inverters are in an OFF state;the first NFET device of the first inverter is in an ON state; and0 V is fed from the second NFET device of the wordline pull down network through the first NFET device of the first inverter to the wordline.