摘要 |
A Fractional-N PLL (2) includes a phase frequency detector module (4) receiving a first clock and a second clock that is associated with a feedback path arrangement. A coarse phase adjustment module (14, 60) receives a coarse phase component and an output signal associated with a divider module (16, 58) used in the feedback path arrangement and performs coarse phase adjustment. A fine phase adjustment module (12, 64) performs fine phase adjustment using a fine phase component and the coarse phase adjustment as input to produce the second clock. The fine phase adjustment module (12, 64) nominally cancels most or all of quantization noise present during the coarse phase adjustment, thereby greatly reducing net phase noise of the divider module (16, 58). A segmentation module (18, 50) generates the coarse phase component and the fine phase component. |