发明名称 Gate driver circuit
摘要 A gate driver circuit may include a driving signal generating unit generating first and second control signals based on a data signal and a fault state signal and controlling gate detection, a driving inverter operating in response to the first and second control signals to generate a gate signal and providing the gate signal to a power switch element, and a soft turn-off/gate detecting unit operating in response to the second control signal, performing a soft turn-off in the case of a fault, and detecting the gate signal to provide a detected signal.
申请公布号 US9300285(B2) 申请公布日期 2016.03.29
申请号 US201414198255 申请日期 2014.03.05
申请人 SAMSUNG ELECTRO-MECHANICS CO., LTD. 发明人 Pang Sung Man
分类号 H01L29/78;H03K17/081;H03K17/16 主分类号 H01L29/78
代理机构 McDermott Will & Emery LLP 代理人 McDermott Will & Emery LLP
主权项 1. A gate driver circuit, comprising: a driving signal generating unit configured to generate first and second control signals based on a data signal and a fault state signal and control gate detection; a driving inverter configured to operate in response to the first and second control signals to generate a gate signal and provide the gate signal to a power switch element; and a soft turn-off/gate detecting unit configured to operate in response to the second control signal, perform a soft turn-off in the case of a fault, and detect the gate signal to provide a detected signal; wherein the first control signal has a level into which the data signal is inverted when the fault state signal is at the low level and has a level into which the fault state signal is inverted regardless of a level of the data signal when the fault state signal is at the high level, wherein the second control signal has a same level as the first control signal when the fault state signal is at the low level and has a level of the fault state signal regardless of the level of the first control signal when the fault state signal is at the high level.
地址 Suwon-Si, Gyeonggi-Do KR